• CMOS low power dissipation
• High noise immunity
• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
• Complies with JEDEC standards:
– JESD8C (2.7 V to 3.6 V)
– JESD7A (2.0 V to 6.0 V)
• Input levels:
– For 74HC393: CMOS level
– For 74HCT393: TTL level
• ESD protection:
– HBM JESD22-A114F exceeds 2000 V
– MM JESD22-A115-A exceeds 200 V.
• Two 4-bit binary counters with individual clocks
• Divide by any binary module up to 28 in one package
• Two master resets to clear each 4-bit counter individually
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