MM74HC573WM INTEGRATED CIRCUIT NATIONAL

The MM74HC573 high speed octal D-type latches utilize advanced silicon-gate P-well CMOS technology. They posses the high noise immunity and low power consumption of standard CMOS integrated circuits, as well as the ability to drive 15 LS-TTL loads. Due to the large output drive capability and the 3-STATE feature, these devices are ide-ally suited for interfacing with bus lines in a bus organized system. When the LATCH ENABLE(LE) input is HIGH, the Q out-puts will follow the D inputs. When the LATCH ENABLE goes LOW, data at the D inputs will be retained at the out-puts until LATCH ENABLE returns HIGH again. When a HIGH logic level is applied to the OUTPUT CONTROL OC input, all outputs go to a HIGH impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. The 74HC logic family is speed, function and pinout com-patible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.

• Typical propagation delay: 18 ns.
• Wide operating voltage range: 2 to 6 volts.
• Low input current: 1P A maximum.
• Low quiescent current: 80P A maximum (74HC Series).
• Compatible with bus-oriented systems.
• Output drive capability: 15 LS-TTL loads.